International Journal of Scientific Progress & Research

ISSN: 2349-4689 (Online)

Article Information

Area Efficient FPGA Architecture of Arithmetic Cosine Transform Using Vedic Multiplier

By: Paridhi Jain, Prof. Nidhi Mishra

Issue: 111
Volume: 39
Published: September 2017

Download

Download PDF

Area Efficient FPGA Architecture of Arithmetic Cosine Transform Using Vedic Multiplier

By: Paridhi Jain, Prof. Nidhi Mishra